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embedded sopc system with altera niosii processor and vhdl examples (en Inglés)
Pong P. Chu
(Autor)
·
Wiley
· Tapa Dura
embedded sopc system with altera niosii processor and vhdl examples (en Inglés) - Chu, Pong P.
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Origen: Reino Unido
(Costos de importación incluídos en el precio)
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Viernes 05 de Julio y el
Martes 16 de Julio.
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Reseña del libro "embedded sopc system with altera niosii processor and vhdl examples (en Inglés)"
The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology. The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http: //www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration.
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